Modified Harvard architecture

The modified Harvard architecture is a variation of the Harvard computer architecture that makes it easier to learn about data. Most modern computers are, in fact, modified Harvard architecture.

Harvard architecture

Main article: Harvard architecture

The original Harvard architecture computer, the Harvard Mark I , employed Entirely separate memory systems to store instructions and data. The CPU fetched the next instruction and loaded or stored data simultaneously and independently. This is in contrast to a Neumann architecture computer, in which both instructions are stored in the same memory system and (without the complexity of a CPU cache ) must be accessed in turn. The physical separation of instruction and data memory is sometimes held to be the distinguishing feature of modern Harvard architecture computers. With microcontrollers(Entire computer systems integrated onto single chips), the use of different memory technologies for instructions (eg flash memory ) and data (Typically read / write memory ) in von Neumann machine is Becoming popular. The true distinction of a Harvard Machine Is That instruction and data memory occupy different address spaces . In other words, a memory address does not uniquely identify a storage location (as it does in a von Neumann machine); to which the address belongs.

Von Neumann architecture

Main article: Von Neumann architecture

A computer with a Neumann architecture has the advantage over pure Harvard machines in that code and also vice versa. This Allows, for example, data to be read from disk storage into memory And Then Executed as code, Self-Optimizing or software systems using technologies Such As just-in-time compilation to write machine code into Their Own Memory And Then later execute it . Another example is self-modifying code , which allows a program to modify itself. A disadvantage of these methods with an increase in the level of protection , which increases the risk of malwareand software defects. In addition, these systems are notoriously difficult to document code flow, and also can make debugging much more difficult.

Modified Harvard architecture

Accordingly, some pure Harvard machines are specialty products. Most modern computers instead has modified Harvard architecture. Those modifications are various ways to loosen the strict separation between code and data, while still supporting the higher performance competitor data and instruction access of the Harvard architecture.

Split-cache (or Almost-von-Neumann) architecture

The most common modification builds a memory hierarchy with a cache cache separating instructions and data. This unified textbook, providing the von Neumann model. [1] Most programmers never need to be aware of the fact that the core processor implements a (modified) Harvard architecture, although they benefit from its speed advantages. Only programmers who write instructions into data memory need to be aware of issues such as cache coherency .

Instruction-memory-as-data architecture

Another change preserves the “separate address space” nature of a Harvard machine. Because data is not directly executable as instructions, these machines are not always viewed as “modified” Harvard architecture:

  • Read access: initial data values ​​can be copied from the memory to the data memory when the program starts. However, if the data is not modified (it may be a constant value, such as pi , or a text string ), it can be accessed by the instruction program often at a premium).
  • Write access: a capability for reprogramming is generally required; few computers are purely ROM -based. For example, a microcontroller usually has operations to write to the memory used to hold its instructions. [2] This capability may be used for the purposes of software updates and EEPROM replacement.

Data-memory-as-instruction architecture

A few Harvard architecture processors, such as the MAXQ, can execute fetched instructions from any memory segment-unlike the original Harvard processor, which can only execute fetched instructions from the program memory segment. Such processors, like other Harvard architecture processors-and unlike pure von Neumann architecture-can read an instruction and read a data value simultaneously, if they’re in separate memory segments, since the processor has at least two separate memory segments with independent data nozzles. The most obvious programming-visible difference between this kind of modified architecture and a pure Neumann architecture is that-when-executing an instruction from one memory segment-the same memory segment can not be simultaneously accessed as data. [3] [4]


Three characteristics can be used to distinguish Harvard machines from pure Harvard and von Neumann machines:

Instruction and data memories

For pure Harvard machines, there is an address “zero” in statement space that refers to an instruction storage location and a separate address “zero” in data space that refers to a separate data storage location. By contrast, von Neumann, and split-cache Modify Harvard machines store “a”, “address”, “zero”, and “address” by how the program is written. However, just like pure Harvard machines, instruction-memory-as-modified data Harvard machines have separate address spaces, so separate separate addresses “zero” for instruction and data space, hence this does not distinguish this type of modified Harvard machines from pure Harvard machines.

Central Processing Unit (CPU)

This is the point of pure or modified Harvard machines, and why they co-exist with the more flexible and general of Neumann architecture: separate memory pathways . The pure Harvard machines have separate paths with separate address spaces. Split-cache modified Harvard machines have separate access paths for CPU caches or other tightly coupled memories, but a unified address space covers the rest of the memory hierarchy . A von Neumann processor has only unified address space. From a programmer’s point of view, a modified Harvard processor in which instruction and data memoriesself-modifying code and program loading. This may be confusing, but such issues are usually visible only to systems programmers and integrators . clarification needed ] Other modified Harvard machines are like pure Harvard machines in this look.

Instruction and data memories can be accessed in different ways

The original Harvard machine, the Mark I , stored instructions on a punched paper tape and data in electro-mechanical counters. This, however, was entirely due to the limitations of technology available at the time. Today a PIC microcontroller might use 12-bit wide flash memory for instructions, and 8-bit wide SRAM for data. In contrast, a ARM7TDMI , a modified Harvard ARM9 core, and SRAM (as 8 bit bytes, in those cases).

Modern uses of the architecture Harvard architecture

Outside of applications where a cacheless DSP or microcontroller is required, most modern processors have a CPU cache which partitions instruction and data.

There are also processes which are used by the most rigorous definition (that program and data memory occupy different address spaces), and are only modified in the weak sense that they are operations to read and / or write program memory as data. For example, LPM (Load Program Memory) and SPM (Store Program Memory) instructions in the AVR Atmel AVR implement such a modification. Similar solutions are found in other microcontrollers such as PIC and Z8Encore! , many families of digital signal processors such as the TI C55x cores , and more. Because instruction is still restricted to the program address space, these processes are very unlike von Neumann machines.

Having separate address spaces creates certain difficulties in programming that can not directly support the notion of data collection. . The C programming language can support multiple address spaces either through non-standard extensions [a] or through the standardized extensions to support embedded processes .

See also

  • Harvard architecture
  • Von Neumann architecture


  1. Jump up^ The maintainers of the C standard library for the GCC to harbor the Atmel microcontroller April, qui HAS separate address spaces for code and data, in state Data in Space Program That separate address spaces Imply a Harvard architecture. They go on to explain that C language only has one point space address, and thus was not designed for Harvard architecture machines. They then describe the non-standard extensions adopted by GCC for the AVR and the AVR C library to allow access to data stored in instruction (program) memory. They even explain why the keyword can not be pressed into memory.


  1. Jump up^ Modified Harvard Architecture: Clarifying Confusion
  2. Jump up^ “AVR109: Self Programming” (PDF) (Application note). Atmel. June 2004 . Retrieved 29 January 2015 .
  3. Jump up^ MAXQ Family User’s Guide. Sections 1.2 “Harvard Memory Architecture” and 2.5 “Pseudo-Von Neumann Memory Access”.
  4. Jump up^ Konark Goel et al. About MAXQ GCC port.

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