Multi-Channel DRAM or MCDRAM (pronounced em cee dee ram  ) is a 3D-stacked DRAM that is used in the Intel Xeon Phi processor codenamed Knights Landing . It is a version of High Bandwidth Memory and a competitor to Hybrid Memory Cube .
The many cores in the Xeon Phi processors, along with their associated vector processing units, enable them to consume many more gigabytes per second than traditional DRAM DIMMs can supply. The “Multi-channel” part of the MCDRAM full name reflects the MCDRAM’s access to their DIMMs.  This high channel count leads to MCDRAM’s high bandwidth, up to 400+ GB / s, although the results are similar to a DIMM access.
Its physical placement on the processor imposes some limits on capacity – up to 16GB at launch, but is speculated to go higher in the future.
The memory can be partitioned at boot time, with some DDR, and the remainder mapped into the physical address space.
The app can request pages of virtual memory to be assigned to the remote DDR Either Directly, to the portion of DDR That is cached by the MCDRAM, or to the portion of the MCDRAM That Is not being white used as cache. One way to do this is via the
When used as cache, the latency of a miss Accessing Both the MCDRAM and DDR is Slightly Higher Than going directly to DDR, and so applications need to be tuned May  to hide excessive AVOID misses.
- Jump up^ Mike P. (sic) (January 20, 2016). “An Intro to MCDRAM (High Bandwidth Memory) on Knights Landing” . software.intel.com . Retrieved April 18,2016 .
- Jump up^ Ian Cutress (Nov 16, 2015). “A few notes on Intel’s Landing Knights and MDRAM modes from SC15” . www.anandtech.com . Retrieved April 18,2016 .
- Jump up^ Christopher Cantalupo; et al. (March 18, 2015). “Extensible Heap Manager for Heterogeneous Memory Platforms and Mixed Memory Policies” (PDF) . memkind.github.io . Retrieved April 18, 2016 .
- Jump up^ Mike P. (sic) (March 10, 2016). “High Bandwidth Memory (MCDRAM) on Knights Landing – Analysis Methods & Tools” . software.intel.com . Retrieved April 18, 2016 .