Microarchitecture simulation

Microarchitecture simulation is an important technique in computer architecture research and computer science education. It is a tool for modeling the design and behavior of a microprocessor and its components, such as the ALU, cache memory , control unit , and data path, among others. The simulation allows researchers to explore the design space and the performance of the microarchitecture features. For example, multiple microarchitecture components, such as branch predictors , re-order buffer , and trace cache, went through numerous simulation cycles before they become common components in contemporary microprocessors of today. In addition, the simulation also enables educators to teach computer organization and architecture courses with hand-on experiments.

For system-level simulation of computer hardware, please refer to the full system simulation .

Classification

Microarchitecture simulation can be classified into multiple categories according to input types and level of details. Specifically, the input can be obtained from an execution of a microprocessor (so-called trace-driven simulation) or a program itself (so-called execution-driven simulation).

A trace-driven simulation [1] reads a fixed sequence of trace records from a file as an input. These traces records usually represent memory references, branch outcomes, or specific machine instructions, among others. While a trace-driven simulation is known to be comparatively fast and its results are highly reproducible, it also requires a very large storage space. On the other hand, an execution-driven simulation [2]reads a program and simulates the execution of machine instructions on the fly. A program file is typically several magnitudes smaller than a trace file. However, the execution-driven simulation is much slower than the trace-driven simulation because it has to process each one-by-one instruction and update all statuses of the microarchitecture components involved. Thus, the selection of input types for simulation is a trade-off between space and time. In particular, a very detailed record for a very accurate simulation requires a very large storage space, while a very accurate execution-driven simulation takes a very long time to execute all instructions in the program.

Apart from input types, the level of detail can be used to classify the simulation. In particular, a piece of software that simulates a microprocessor executing a program on a cycle-by-cycle is known to cycle-accurate simulator , while instruction set simulator only models the execution of a program on microprocessor through the eyes of an instruction scheduler along with a coarse timing of instruction execution. Computer science classes in computer science with hands-on experiments in the field of simulation and the use of simulators as tools for teaching.

Uses

Microarchitecture simulators are deployed for a variety of purposes. It enables researchers to evaluate their ideas with a real microprocessor chip, which is both expensive and time consuming. For instance, simulating a microprocessor with thousands of cores along with multiple levels of cache memory incurs a small cost when comparing the manufacturing of a prototyping chip. The researchers can also play with different configurations of different types of devices.

Another use of the microarchitecture simulator is in education. [3] Given the role of a microprocessor and its architectures, the microarchitecture simulator is ideal for modeling and experimenting with different features and architectures over the course of a semester. For example, students can start with a microarchitecture simulator that models a simple microprocessor design at the beginning of a semester. Progress, additional features, such as pipelining instruction , register renaming , reservation stations , out-of-order execution , and scoreboarding, can be modeled and added to the simulator as they are introduced in the classroom. Microarchitecture simulator provides the flexibility of reconfiguration and testing with minimal costs.

Examples

  • Shade [4] (trace-driven, set simulator statement)
  • SimpleScalar [5] (execution-driven, cycle-accurate simulator)
  • SPIM [6] (execution-driven, set simulator statement)
  • SMTSIM [7] (execution-driven, cycle-accurate simulator)

References

  1. Jump up^ Uhlig, RA, & Mudge, TN (2004). Trace-Driven Memory Simulation: A Survey. ACM Computing Surveys, 29 (2), 128-170.
  2. Jump up^ Burger, D., & Austin, TM (1997). The Simplescalar Tool Set Version 2.0. Computer Architecture News, 25 (3), 13-25.
  3. Jump up^ Skadron, K. (1996). A Microprocessor Survey Course for Advanced Computer Architecture. In Proceedings of the 2002 ACM SIGCSE Conference, 152-156.
  4. Jump up^ Cmelik, RF, & Keppel, D. (1994). Shade: A Fast Instruction-Set Simulator for Execution Profiling. ACM SIGMETRICS Performance Evaluation Review, 22 (1), 128-137.
  5. Jump up^ Austin, T., Larson, E., & Ernst, D. (2002). SimpleScalar: An Infrastructure for Computer System Modeling. IEEE Computer Magazine, 35 (2), 59-67.
  6. Jump up^ Patterson, DA, & Hennessy, JL (2011). Computer Organization and Design: The Hardware / Software Interface, Morgan Kaufmann.
  7. Jump up^ Tullsen, DM (1996). Simulation and Modeling of a Simultaneous Multithreading Processor. In Proceedings of the 22nd Annual Computer Measurement Group Conference.

Leave a Reply

Your email address will not be published. Required fields are marked *

Copyright computerforum.eu 2018
Shale theme by Siteturner